The present invention relates to an integrated circuit, and more particularly to a method and apparatus for controlling a level of switching induced noise present on power supply buses of the integrated circuit.
In the integrated circuit technology, the overall trend is toward smaller, faster, and lower power logic gates. This allows the gates and their leads to be physically reduced in size, which in turn allows more logic gates to be manufactured per square inch of semiconductor material. Unfortunately, with respect to output devices the overall trend cannot be readily followed. This is primarily because of the relatively larger capacitances and inductances of the external conductors that connect the output devices to external logic inputs are not undergoing physical reduction to the same extent as the internal logic gates.
The result of this fact is that a significant proportion of each integrated circuit is occupied by output pad drivers in order to drive the connecting leads and external circuits. A related result is the fact that a very significant proportion of the current passing through the integrated circuit passes through the output pad drivers as an output current which the integrated circuit is sourcing or sinking.
Besides drawing a major portion of the current passing through an integrated circuit, many output pad drivers of many modern integrated circuits operate and draw their currents together. For example, sixteen output pad drivers may operate together to drive a sixteen bit wide address or data bus. Unfortunately, this means that groups of sixteen, thirty-two, or even sixty-four output pad drivers often are switching logic states at the same time. Such group switching may induce transient voltages on the integrated circuit's power bus conductors because of inherent current carrying limitations of physical size, parasitic inductances and resistances. Transient voltages especially may occur if a large majority of the group switches from one specific state, such as a logic HI, to the opposite state, that is logic LO. Because of the effect the transient voltages have on the output pad drivers, the known practice of separating the internal logic power supply buses from the input/output output power supply buses does not solve these problems.
The parasitic inductances and resistances, especially at very high switching speeds, may make these switching transients worse because of the their respective oppositions to changes in current. This opposition impedes the flow of current into the integrated circuit via the output pad driver power supply leads, resulting in a transient increase in voltage of the power supply's lower potential and a decrease in the voltage of the power supply's upper potential. The transient increase in the level of the lower potential of the power supply is commonly referred to as ground bounce, and the transient decrease in the upper potential of the power supply is commonly referred to as transient noise. Both types of transient voltages may cause problems and should be carefully managed, but because of the voltage definition for a logic LO is tighter than for a logic HI, ground bounce is more often the source of transient problems.
Power supply transient noise effects both the integrated circuit causing the noise and other integrated circuits to which it is connected. A transient bounce induced on the lower potential of an integrated circuit by output driver currents may induce false logic HIs to unrelated logic circuits that happen to share the same lower potential bus. This is why integrated circuits often have separate power supply buses for their internal logic gates and their output pad drivers. The output pad driver power supply buses, as is well known, are commonly used to sink any incoming surges on the integrated circuit input leads via protection diodes, thus the pad driver power supply buses are usually referred to as the input/output power supply buses. The separation of the internal power supply buses and the output pad driver buses allows the power supplies to have their upper and lower potential conductors connected together externally, where larger conductors and suppression capacitors may be used to reduce transient noise generated by the integrated circuit. Thus, noise can be suppressed and a common reference potential is provided to promote signal handling throughout among integrated circuits.
Externally, a subsequent integrated circuit receiving a binary output from a driver of an integrated circuit experiencing ground bounce may be driven with a false logic HI, or by a meta-voltage level that is greater than a logic LO but less than a logic HI. On the other hand, the next integrated circuit receiving an output from a driver of an integrated circuit experiencing upper potential noise transients may be driven with a false logic LO, or by a meta-voltage level that is less than a logic HI but greater than a logic LO. These are both undesirable situations, and the heretofore known solutions have led to significant further problems.
One previous solution to the transient noise problem for both internal and external logic circuits is to delay the time that the driver output binary value is considered valid until after transient voltages have settled down. This solution requires that any false binary states triggered during the delay either be cleared or be "don't care" logic signals. The problem with this approach is that it builds-in a predetermined delay into each and every binary output transfer. Such built-in delays are an impediment to the trend toward faster and faster data rates.
Another common solution is to delay the rate of change of the output drive current by changing the switching rate of the output driver. This solution always delays the rate of change of the output driver current as a way to prevent and/or reduce noise transients. Like the set delay approach, this solution inserts a switching delay, but it inserts them into the output drivers to reduce the switching rate that binary states are changing during an information transfer, and hence the amount of transient noise induced at the leading and trailing edges of data pulses, which is a major contributor to this type of transient noise. Additionally, by reducing the rate that the output current may change, often the amount of the ground bounce and the settling time of the ground bounce, as well as transient noise, are reduced. However, this second approach still delays the rate of change of every switching transition on the assumption that suppression of ground bounce and transient noise will always be needed. This, therefore is also an impediment to the trend toward faster switching times.
It is therefore an object of this invention to provide a ground bounce and transient noise reduction apparatus that only operates when needed to suppress problems with ground bounce and/or power conductor transient noise.
It is another object of this invention to provide a ground bounce and transient noise reduction apparatus that delays the rate of change of the output current as a function of the amount of ground bounce and/or transient noise in order to minimize the amount of delay required.